Home > Research > Finished Projects
- + Development of the Wireless Power Converter System for Mobile Handset
- + 1nJ/bit ULP(Ultra Low Power) 통신 핵심기술 개발
- + Stop Lamp Switch Driver IC
- + UHF band RFID system
- + 1-D Pulsed TOF LADAR Receiver for military application
- + Unipolar Impulse Radar IP Development
- + 평판 디스플레이용 반도체 설계 인력 양성 사업
- + Predictable SoC architecture & modeling
- + 4세대 이동통신용 LNA 설계
- + Low Supply and Low Jitter PLL Based Frequency Synthesizer Design
- + Development of digital-RF IC for ATCS compatible tuner
- + Impulse UWB Rader IC Design
- + Cordless mouse RF transceiver IP Development
- + Development of tuner RFIC for digital TV Applications
- + Spread Spectrum Clock Generator for TCONT application
- + CMOS FM Receiver Development
- + Clock Manager (CM) for FPGA
- + IR-UWB transceiver Design
- + High input-impedance voice ADC for digital microphone
- + IT-SOC
Predictable SoC architecture & modeling
- Project name
- - Predictable SoC architecture & modeling
- Project objective
- - To reduce time & fabrication in the RF transceiver design for LTE, m-Wimax, IMT Advanced Application, Research and develop behavior model of above systems
- Project Contents & Scope
- 1. How to simulate the RF system and to develop test-bed.
- 2. Optimize Digital-RF & analog based receiver architecture
- 3. Block level behavioral modeling
- 4. Effect of PVT variation block IP
- 5. Design guide-line for system design and solution for system level problem
- 6. Substrate coupling/isolation minimization and coupling effect modeling
- Project Result
- Publications
- Project Term
- - 1st year : ~2010.2.15
- - 2nd year : ~2011.2.15
- Project Sponsor
- - System R&D Lab.
- - Telecommunication R&D Center
- - Telecommunication Business
- - SAMSUNG ELECTRONICS CO.,LTD
